Printed circuit board assemblies (PCBAs) are subjected to various loads during handling and assembling. These loads can result in bending of a printed circuit board (PCB) and in pulling forces applied on a PCB. Especially the bending of PCBAs can cause failures of solder joints and surface mounted devices (SMDs), e.g., multi-layer ceramic capacitors are very vulnerable to this type of loads. Furthermore, tolerances of mounting points and resting areas can introduce mean-stress in solder joints and SMDs and, thus, can reduce their resistance against dynamic and thermal loads.
Our static analysis process can be used to reproduce the loads from assembly and handling virtually. In our analysis process the surface strain of a PCB is simulated for multiple load sets based on an assembly process or based on mounting conditions, e.g., tolerances of mounting points and resting areas. Since our static simulation process is ready for massive parallelization in the cloud, we can consider many load sets, e.g., retrieved from design of experiment (DoE) algorithms, in our simulations. Based on a huge number of static analysis results, the statistics of the PCB surface strain can be estimated. The strain statistics are then compared to a customer defined strain limit, e.g., retrieved from qualification procedures like defined in AEC-Q200, IPC/JEDEC 9702, or IPC/JEDEC 9707 test specification, to identify critical areas on the PCBA.